The present invention relates to digital computer systems. More particularly, it relates to memory sense or read amplifiers for such computer systems.
In computer systems, there are numerous uses for random access memories (RAMs). For example, a computer system may include one or more central processor units (CPUs), each of which may include at least one cache memory. Cache memories are used as a temporary store for blocks of data most used by the associated CPU. They provide a rapid access to the stored data which otherwise must be manipulated by accessing the much slower main memory. In a co-pending patent application, referenced herein above, there is described a memory unit which may be accessed during each half cycle of the controlling clock signal.
A sense or read amplifier must be capable of sensing very small differential current signals and to convert those current signals into voltage signals of a magnitude suitable for use with CML output circuitry.